In electrically erasable programmable read only memories (EEPROMs) a high voltage is required to program and erase. The high voltage can be either externally applied or internally generated. An internally generated high voltage, although requiring more circuitry, is much more convenient for the end user. For such internally generated high voltage, the current capability is limited. The EEPROM cells do require some current, however, for programming. Consequently, efficient use of the high voltage power supply current under the control of a logic signal is required.
This typically has been done by using another pump circuit for each high voltage signal to be generated in conjunction with the high voltage separately generated. This requires a clock signal in addition to the control logic signal. Also, each pump circuit requires substantial chip area in order to obtain sufficient current.